Since the invention of the integrated circuit (IC), the semiconductor industry has experienced continued rapid growth due to continuous improvements in the integration density of various electronic components (i.e., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from repeated reductions in minimum feature size, which allows more components to be integrated into a given area.
These integration improvements are essentially two-dimensional 2-D in nature, in that the volume occupied by the integrated components is essentially on the surface of the semiconductor wafer. Although dramatic improvement in lithography has resulted in considerable improvement in 2-D IC formation, there are physical limits to the density that can be achieved in two dimensions. One of these limits is the minimum size needed to make these components. Also, when more devices are put into one chip, more complex designs are required.
Particularly in radio frequency (RF) and mixed signal designs, inductors and transformers are commonly used. However, the 2-D integration of these components generally requires a large amount of chip area in the IC product. Further, because of the general desire to reduce these feature sizes, the metal lines in these components may decrease in size, thus increasing the resistance in the metal lines. The increased resistance may in turn lower the quality (Q) factor of these inductors and transformers. Also, having inductors and transformers on the chip or die may cause the magnetic flux of the inductors and transformers to pass through the chip. The magnetic flux may couple with devices in the chip, such as transistors, metal lines, and/or interconnects to create unwanted noise. Accordingly, there is a need in the art to overcome these stated deficiencies.